Q67036-A1175 데이터 시트보기 (PDF) - Infineon Technologies

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Q67036-A1175

Wireless Components ASK/FSK Transmitter 915 MHz

Infineon Technologies 

TDA 5102

Functional Description

3.4 Functional Blocks

3.4.1 PLL Synthesizer

The Phase Locked Loop synthesizer consists of a Voltage Controlled Oscillator

(VCO), an asynchronous divider chain, a phase detector, a charge pump and a

loop filter. It is fully implemented on chip. The tuning circuit of the VCO consist-

ing of spiral inductors and varactor diodes is on chip, too. Therefore no addi-

tional external components are necessary. The nominal center frequency of the

VCO is 915 MHz. The oscillator signal is fed both, to the synthesizer divider

chain and to the power amplifier. The overall division ratio of the asynchronous

divider chain is 128 in case of a 7.15 MHz crystal or 64 in case of a 14.3 MHz

crystal and can be selected via CSEL (pin 16). The phase detector is a Type IV

PD with charge pump. The passive loop filter is realized on chip.

3.4.2 Crystal Oscillator

The crystal oscillator operates either at 7.15 MHz or at 14.3 MHz.

The reference frequency can be chosen by the signal at CSEL (pin 16).

Table 3-3

CSEL (pin 16)

Low1)

Open2)

1) Low: Voltage at pin < 0.2 V

2) Open: Pin open

Crystal Frequency

7.15 MHz

14.3 MHz

For both quartz frequency options, 894 kHz or 3.57 MHz are available as output

frequencies of the clock output CLKOUT (pin 8) to drive the clock input of a

micro controller.

The frequency at CLKOUT (pin 8) is controlled by the signal at CLKDIV (pin 9)

Table 3-4

CLKDIV (pin 9)

Low1)

Open2)

1) Low: Voltage at pin < 0.2 V

2) Open: Pin open

CLKOUT Frequency

3.57 MHz

894 kHz

Wireless Components

3-8

Specification, October 2001

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