TDA18260HN(2010) 데이터 시트보기 (PDF) - NXP Semiconductors.
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TDA18260HN Datasheet PDF : 8 Pages
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NXP Semiconductors
5. Block diagram
TDA18260HN
Dual cable Silicon Tuner
RF AGC1
BUFFER filter 1 bis
AGC2
RF
filter 2
RF_IN 6
AGC1
LEVEL
CONTROL
7
LT
8
MTO1
MTO2 5
LEVEL
CONTROL
LEVEL
CONTROL
BUFFER RF AGC1 AGC2
filter 1 bis
RF
filter 2
TDA18260HN
Fig 1. Block diagram
SCL_A
VIFAGC_A
M/S
SDA_A
48 39 38 37
I2C-BUS
INTERFACE
IF
mixer SELECTIVITY
IF
AGC
36 IFO_P_A
35
IFO_N_A
45 CPLO_A
SYNTHESIZER 44
VTLO_A
CRYSTAL
OSCILATOR
34
XTO_P
33
XTO_N
31 XTAL_P
30
XTAL_N
17 VTLO_B
SYNTHESIZER 16
CPLO_B
26 IFO_N_B
mixer
IF
SELECTIVITY
IF
AGC
25
IFO_P_B
I2C-BUS
INTERFACE
13 22 23 24
AS
SDA_B
SCL_B
VIFAGC_B
001aal953
TDA18260HN_SDS
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 December 2010
© NXP B.V. 2010. All rights reserved.
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