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TDA1566

I²C-bus controlled dual channel 46 W/2Ω, single channel 92 W/1Ωamplifier with load diagnostic features

NXP Semiconductors. 

NXP Semiconductors

TDA1566

I2C-bus controlled dual channel/single channel amplifier

Table 3.

Symbol

SCL

SDA

TAB

Pin description TDA1566J …continued

Pin

Description

25

I2C-bus clock input

26

I2C-bus data input/output

27

connect to PGND

6. Functional description

6.1 General

Naming conventions used in this document:

• Reference to bits in instruction bytes: IBx[Dy] refers to bit Dy of instruction byte x

• Reference to bits in data bytes: DBx[Dy] refers to bit Dy of data byte x

6.1.1 Mode selection

The ADS1 pin selects the I2C-bus or non-I2C-bus mode operation as listed in Table 4. See

Section 6.1.6 and Section 6.4.3 for the ADS1 pin functionality.

Table 4.

Pin

ADS1

Mode selection with the ADS1 pin

Non-I2C-bus mode

GND

I2C-bus mode

open or via 33 kΩ to GND

Table 5 lists the control for the I2C-bus mode operation. In I2C-bus mode the EN pin

operates at CMOS compatible LOW and HIGH logic levels. With the EN pin LOW the

TDA1566 is switched off and the quiescent current is at its lowest value. With the enable

pin HIGH the operation mode of the TDA1566 is selected with IB1[D0] and IB1[D1]. The

I2C-bus instruction and data bytes are described in Section 6.4.2 and Section 6.4.3.

Table 5. I2C-bus mode operation

EN pin

IB1[D0]

HIGH (> 2.6 V)

1

1

0

LOW (< 1.0 V)

don’t care

IB2[D0]

0

1

don’t care

don’t care

Operation mode

operating

mute

standby

off

In non-I2C-bus mode the TDA1566 has 3 operation modes: off/mute/operation. The

operation mode is selected with the EN pin. Figure 5 displays the required voltage levels

at the EN pin in I2C-bus and non-I2C-bus mode. For the voltage levels see Section 9

“Characteristics”.

TDA1566_2

Product data sheet

Rev. 02 — 20 August 2007

© NXP B.V. 2007. All rights reserved.

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