Read Cycle (1) Timing Diagram
CLE
tCLS tCLH
tCS
tCH
CE
tWC
TC581282AXB
WE
tALH tALS
tALH
tAR2
ALE
RE
tDS tDH
tR
tDS tDH
tDS tDH
tWB
tDS tDH
I/O1
to I/O8
RY/BY
00H
A0 to A7 A9 to A16 A17toA23
Column address
N*
* Read Operation using 00H Command N: 0 to 255
tRR
tRC
tREA
DOUT DOUT DOUT
N N+1 N+2
DOUT
527
: VIH or VIL
Read Cycle (1) Timing Diagram: When Interrupted by CE
CLE
tCLS tCLH
tCS
tCH
CE
tWC
tCHZ
WE
tALH tALS
tALH
tAR2
ALE
RE
tDS tDH
tR
tDS tDH
tDS tDH
tWB
tDS tDH
I/O1
to I/O8
RY/BY
00H
A0 to A7 A9 to A16 A17toA23
Column address
N*
* Read Operation using 00H Command N: 0 to 255
tRR
tRC
tREA
tOH
tRHZ
DOUT DOUT DOUT
N
N+1 N+2
: VIH or VIL
2001-12-04 9/31