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TC581282AXB
(11) When four address cycles are input
Although the device may read in a fourth address, it is ignored inside the chip.
Read operation
CLE
CE
WE
ALE
I/O
RY/BY
00H, 01H, 50H
Address input
Internal read operation starts when WE goes High in the third cycle.
Figure 22.
Ignored
Program operation
CLE
CE
WE
ALE
I/O
80H
Address input
Ignored
Figure 23.
Data input
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