TB6674FAG 데이터 시트보기 (PDF) - Toshiba

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TB6674FAG

BiCD Integrated Circuit Silicon Monolithic

Toshiba 

TB6674PG/FG/FAG

Undervoltage Lockout Circuit（UVLO）

The TB6674 incorporates an under voltage lockout circuit.

Outputs are turned off (Hi-Z) under the conditions as follows;

VCC ≤ 4.0 V (Design target) or

VS1A ≤ 6.0 V (Design target) and VS1B ≤ 6.0 V (Design target) or

VS2A ≤ 2.2 V (Design target)

The UVLO circuit has a hysteresis and the function recovers under the conditions as follows;

VCC = 4.1 V (Design target), VS1A/ VS1B = 6.5 V (Design target), VS2A = 2.3 V (Design target)

<UVLO operation>

4.1 V (design target only)

Vcc voltage

4.0 V (design target only)

H

UVLO internal signal

L

UVLO operation

H

Output pin

L

Normal operation

OFF（Hi-Z）

<UVLO operation>

6.5 V (design target only)

Vs1A, Vs1B voltage

6.0 V (design target only)

H

UVLO internal signal L

UVLO operation

H

Output pin

L

Normal operation

OFF（Hi-Z）

6

Ver.3 2010-07-07

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