STV0042A
PIN INTERNAL CIRCUITRY (continued)
XTL
Figure 18
3
460Ω
XTL
750µA
460Ω
3
22
5pF
GND 0V
500µA
750µA
CPUMP L, CPUMP R
An offset on the PLL loop filter will cause an offset
in the two 1µA currents that will prevent the PLL
from drifting-off frequency.
Figure 19
100µA
Dig Synth
CPUMP L
CPUMP R
100µA
1µA
Loop Filter Tracking
1µA
VCO Input
DET L, DET R
I2 - I1 = f (phase error).
Figure 20
I2
DET L
DET R
I1
AMPLK L, AMPLK R, AGC L, AGC R
I2 and I1 from the amplitude detecting mixer.
Figure 21
To VCA
AMPLK L
AMPLK R
I2
2
I1
5µA
AGC L
AGC R
10kΩ
VREF 2.4V
160µA
VREF
The 400µA source is off during stand-by mode.
Figure 22
Vbg 1.2V
4
10kΩ
VREF (2.4V)
10kΩ
400µA
SUMOUT
Figure 23
GND 0V
VREF 2.4V
Audio
49kΩ
49kΩ
50kΩ
1
100µA
SUMOUT
PK IN
Figure 24
VREF 2.4V
PK IN
67kΩ
1
To Peak Det
100µA
V 12V
Doubled bonded (two bond wires and two pads for
one package pin) :
- One pad is connected to all of the 12V ESD and
video guard rings.
- The second pad is connected to power up the
video block.
V GND
Doubled bonded :
- One pad is connectedto power-up all of the video
mux and I/O.
- The second pad is only as a low noise GND for
the video input.
VDD 5V, GND 5V
Connected to XTL oscillator and the bulk of the
CMOS logic and 5V ESD.
14/24