SMD5962-92324 데이터 시트보기 (PDF) - Unspecified
부품명
상세내역
일치하는 목록
SMD5962-92324 Datasheet PDF : 10 Pages
| |||
STK11C68-M
STORE/RECALL CYCLE
SYMBOLS
NO.
#1
Alt.
PARAMETER
22 tAVAV
tRC
STORE/RECALL Initiation Cycle Time
23 tELQZp
Chip Enable to Output Inactive
24 tELQXS
tSTOREq STORE Cycle Time
25 tELQXR
tRECALLr RECALL Cycle Time
26 tAVELNs
tAE
Address Set-up to Chip Enable
27 tELEHNs,t tEP
Chip Enable Pulse Width
28 tEHAXNs
tEA
Chip Disable to Address Change
STK11C68-35M
MIN MAX
(VCC = 5.0V ± 10%)
STK11C68-45M
MIN MAX
STK11C68-55M
MIN MAX
UNITS
35
45
55
ns
75
75
85
ns
10
10
10
ms
20
20
20
µs
0
0
0
ns
25
35
45
ns
0
0
0
ns
Note p: Once the software STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
Note q: Note that STORE cycles (but not RECALLs) are aborted by VCC < 4.0V (STORE inhibit).
Note r: A RECALL cycle is initiated automatically at power up when VCC exceeds 4.0V. tRECALL is measured from the point at which VCC exceeds 4.5V.
Note s: Noise on the E pin may trigger multiple read cycles from the same address and abort the address sequence.
Note t: If the Chip Enable Pulse Width is less than tELQV (see READ CYCLE #2) but greater than or equal to tELEHN, then the data may not be valid at the end of
the low pulse, however the STORE or RECALL will still be initiated.
Note u: W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW throughout.
Addresses #1 through #6 are found in the MODE SELECTION table. Address #6 determines whether the STK11C68-M performs a STORE or RECALL.
Note v: E must be used to clock in the address sequence for the Software STORE and RECALL cycles.
STORE/RECALL CYCLE u,v
ADDRESS
E
26
tAVELN
22
tAVAV
ADDRESS #1
27
tELEHN
28
tEHAXN
DATA OUT
DATA VALID
22
tAVAV
ADDRESS #6
24
tSTORE
23
tELQZ
DATA VALID
25
tRECALL
HIGH IMPEDANCE
4-37
Share Link: 