HCF4527B 데이터 시트보기 (PDF) - STMicroelectronics
부품명
상세내역
일치하는 목록
HCF4527B Datasheet PDF : 13 Pages
| |||
HCC/HCF4527B
DYNAMIC ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
tR
Inhibit Input Removal Time
tR
Set Remova Time
tR
Clear Removal Time
Test Conditions
Value
Unit
VDD (V) Min. Typ. Max.
5
240 120
10 130 65
ns
15 110 55
5
150 75
10
80
40
ns
15
50
25
5
60 30
10
40
20
ns
15
30
15
APPLICATION NOTE
For fractional multipliers with more than one digit,
HCC/HCF4527B devices may be cascated in two
different modes: the Add mode and the Mltiply mode
(see figures 1 and 2).
When two units are cascated in Add mode and pro-
grammed to 9 and 4 respectively, the more signifi-
cant unit will have 9 output pulses for every 10 input
pulses and the other unit will have 4 output pulses
for every 100 input pulses for a total of:
9
10
+
4
100
=
94
100
In the multiply mode, the fraction programmed into
the first rate multiplier is multiplied by the fraction
programmed into the second one:
If N1 = 9 and N2 = 4
fout2
=
4
10
fout1
fout1
=
9
10
fclock
fout2
=
4
10
×
9
10
fclock
=
36
100
fclock
Therefore 36 output pulses for every 100 clock input
pulses.
7/13
Share Link: 