datasheetbank_Logo
전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

PCF50732H/F1 데이터 시트보기 (PDF) - Philips Electronics

부품명
상세내역
일치하는 목록
PCF50732H/F1
Philips
Philips Electronics Philips
PCF50732H/F1 Datasheet PDF : 64 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
Baseband and audio interface for GSM
Objective specification
PCF50732
9.1.1 GMSK MODULATOR
The input signal of the GMSK modulator is a bitstream
coming from the baseband serial interface, with a
sampling frequency of 270.833 kHz. Typically 148 bits are
modulated during a normal burst, and 88 bits during an
access burst. Using this bitstream, the GMSK modulator
generates digital I and Q components as described in
“GSM recommendation 05.04”.
This is done in three steps:
1. First the incoming bitstream is differentially encoded
by an EXOR operation on the actual bit and the
previous bit
2. The instantaneous phase (ϕ) is calculated using a
gaussian filter with an impulse response of 4 taps
3. A look-up table provides the cosine (I component) and
the sine values (Q component) of the phase (ϕ).
The look-up table also interpolates the signal to a
16 times higher frequency (4.333 MHz).
9.1.2 10-BIT DACS
The two 10-bit DACs are working at a sampling rate of
4.3333 MHz. They convert the digital I and Q components
of the GMSK modulator to differential analog
I and Q signals.
9.1.3 LOW-PASS FILTER
The analog output signals of the DACs are filtered by
analog reconstruction low-pass filters.
These filters remove high frequency components of the
DAC output signals and attenuate components around the
4.3333 MHz sampling frequency. The low-pass filters
have a cut-off frequency of approximately 300 kHz, with
very linear phase behaviour in the pass band.
The baseband receive section can be switched between
two modes of operation:
ZIF (zero IF) mode for radio sections, which convert the
receive signal down to baseband. In this mode the ADC
is sampled at 6.5 MHz, the decimation filter samples
down by a factor of 24 with a pass band as specified in
Fig.3. The serial interface output BDIO delivers
2 × 12-bit values for I and Q components at
270.833 kHz.
NZIF (near zero IF) mode for radio sections, which
converts the receive signal down to a centre frequency
of 100 kHz. In this mode the ADC is sampled at 13 MHz,
the decimation filter samples down by a factor of 24 with
a pass band as specified in Fig.3. The serial interface
output BDIO delivers 2 × 12-bit values for I and Q
components at 541.667 kHz.
9.2.1 RECEIVE ADC
The receive ADCs are Σ∆ analog-to-digital converters that
convert differential input signals into1-bit data streams with
a sampling frequency of 6.5 or 13 MHz.
9.2.2 DIGITAL DECIMATION FILTER
Digital filtering is required for:
Suppression of out-of-band noise produced by the
Σ∆ ADC
Decimation of the sampling rate (6.5 or 13 MHz) by 24
System level filtering.
The digital filtering is performed by a digital FIR filter with a
group delay for this running average filter of approximately
23 or 11.5 µs respectively. The filter uses twos
complement arithmetic.
9.2 Baseband receive path
The baseband receive path consists of two parts:
Receive ADC: Σ∆ analog-to-digital converters
Decimation filter: digital decimation filters for I and Q.
1999 May 03
10

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]