MC1596G 데이터 시트보기 (PDF) - Motorola => Freescale

부품명

상세내역

일치하는 목록

MC1596G

BALANCED MODULATOR/DEMODULATOR

Motorola => Freescale 

GENERAL OPERATING INFORMATION*

Notel –Carrier Feedthrough

Carrier feedthrough is defined as the output voltage at carrier

frequency with only the carrier applied (signal voltage = 0),

Carrier null is achieved by balancing the currents in the differ-

ential amplifier by means of a bias trim potentiometer (RI of

Figure 5).

Note 2 – Carriar Suppression

base current, PD = 2 15 (V6 – V1O) + 15 (V5 – V1O) where sub-

scripts refer to pin numbers.

Note 6 – Design Equations

The following is a partial list of design quations needQ, to

operate the circuit with other supply voltagas and inpu~<&,O~~-

tions. See Note 3 for Re equation.

,., &-c.>~.,....z,.h

Carrier suppression is defined as the ratio of each sideband out-

put to carrier output for the carrier and signal volt~e levels speci-

fied.

Carrier suppression is very dependent on carrier input level, as

shown in Figure 22. A low value of the carrier does not fully

switch the upper switching devices, and results in lower signal

gain, hence lower carrier suppression. A higher than optimum car-

rier level results in unnecessary device and circuit carrier feed-

through, which again degenerates the suppression figure. The

MC1 596 has been characterized with a 60 mV(rms) sinewave

carrier input signal. This level provides optimum carrier suppres-

sion at carrier frequencies in the vicinity of 500 kHz, and is

generally recommended for balanced modulator applications.

Carrier feedthrough is independent of signal level, Vs. Thus

carrier suppression can be maximized by operating with large sig-

nal levels. However, a linear operating mode must be maintained

in the signal-input transistor pair — or harmonics of the modulating

signal will be generated and appear in the device output as spurious

sidebands of the suppressed carrier. This requirement places an

uPPer limit on in Put-signal amplitude (see Note 3 and Figure 20).

Note also that an optimum carrier level is recommended in Fig-

ure 22 for good carrier suppression and minimum spurious side-

~a,.

‘ ‘?t{Jp

.<:)

..-,,\...

,Is ~.i+,,

..>+~,i?.“:i$:t;,,

,?$tefi?=Biasing

QJr,. .....

v6=vg=v+–15RL

band generation.

At higher frequencies circuit layout is very important in order

$$~$$~~fie MC1 596 requires three dc bias vo Itage levels which must be

..~~et externally. Guidelines for setting up these three levels include

to minimize carrier feedthrough. Shielding may be necessary in ,,,~i~ maintaining at Ie=t 2 volts collector-base bias on all transistors

order to prevent capacitive coupling between the carrier in~$t

r.?,.’~..~:

leads and the output leads.

!l>.< l\,,,:,,

while not exceeding the voltages given in the absolute maximum

rating table;

30 Vdc > [(V6, Vg) – (V7, V8)] > 2 Vdc

30 Vdc > [(V7, V8) – (Vi, V4)] > 2.7 Vdc

30Vdc > [(VI, V4) – (V5)1 2 2.7 Vdc

.,.

x:..

,:1<

A constant dc potential is applied t~~~h$.~$?~er input termina Is to

fully switch two of the upper tr~%i{~~{$><’on” and two transistors

“off” (Vc = 0.5 Vdc).

amplifier.

This in:&~+f~f.d~>~~,,::i~, ’ forms a cascode differential

Linear operation req:i,~~~h~at the signal input be below a criti-

cal value determined by ~~’~l~,,$he bias current 15

The foregoing conditions are based on the following approxima-

tions:

V6 = Vg,

V7 = V8,

VJ = V4

Bias currents flowing into pins 1, 4, 7, and 8 are transistor base

currents and can normally be neglected if external bias dividers

are designed to carry 1.0 mA or more,

,,~,~>,,::{,y,.,,~;~’

Note that in,j$~e$st~’’cir cuit of F igura 10, VS corresponds

maximum v~e q~ ~volt peak.

>:8’::‘:J:,$L>r$~F$.’

Note 4 ~~~&on-Mode

Swing

to a

?~&-~&~mon-mode swing is the voltage which may be applied

to bo~bases of the signal differential amplifier, without saturating

the current sources or without saturating the differential amplifier

itself by swinging it into the upper switching devices. This swing

is variable depending on the particular circuit and bi~ing condi-

tions chosen (see Note 6).

Note 8 – Transadmittance Bandwidth

Carriar transadmittance bandwidth is the 3-dB bandwidth of

the device fomard transadmittance as defined by:

i. (each sideband)

Y21C =

vs (signal)

Vo=o

Signai transadmittance bandwidth is the 3dB bandwidth of the

device forward transedmittance as defined by:

i. (signal)

Y21S = VS (signal) Vc = 0.5 Vdc, V. = O

Note 5 – Power Dissipation

Power dissipation, PD, within the integrated circuit package

should be calculated as the summation of tha voltage-current prod-

UCtS at each pOrt, i.e. aSSUming

Vg = V6, 15 = 16 = 19 and ignoring

*Pin number references pertain to this device when packaged in a

matal can. To ascertain the corresponding pin numbers for plas-

tic or ceramic packaged devices refer to the first page of this

specification sheet.

MOTOROLA

@

Semiconductor Products Inc.

3

Share Link: