SP8401 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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SP8401 Datasheet PDF : 4 Pages
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SP8401
Very Low Phase Noise 300MHz ÷ 10/11
The SP8401 is a very low phase noise variable modulus
divider. Special circuit techniques have been used to reduce
the phase noise considerably below that produced by
standard dividers. The modulus control input is CMOS or TTL
compatible.
The SP8401 is packaged in a 28 pin plastic SO package
to be compatible with the SP8400 and SP8402 devices.
FEATURES
I Very low Phase Noise (Typically -160dBc/Hz at 1kHz
offset)
I Supply Voltage 5V
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Output Current
Storage Temperature Range
Maximum Clock Input Voltage
6.5V
20mA
-55°C to +125°C
2.5V p-p
DS3230
ISSUE 3.1
April 1994
Ordering Information
SP8401 KG MPES(Commercial Grade)
N/C
1
N/C
2
N/C
3
VCC +5V
4
GND
5
CLOCK INPUT
6
CLOCK INPUT
7
CLOCK INPUT
8
CLOCK INPUT
9
GND
10
VCC +5V
11
VCC +5V
12
N/C
13
MODULUS CONTROL
14
28
N/C
27
N/C
26
N/C
25
N/C
24
N/C
23
N/C
22
N/C
21
OUTPUT
20
OUTPUT
19
N/C
18
VCC +5V
17
N/C
16
N/C
15
N/C
Fig.1 Pin connections - top view
MP28
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
–160
–170
1
10
100
1k
10k
Frequency (Hz)
Fig.2 Typical single sideband phase noise measured at 300MHz
100k
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