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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

AR20441-11 데이터 시트보기 (PDF) - Conexant Systems

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AR20441-11 Datasheet PDF : 24 Pages
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AccessRunner
Pin Name
I/O
R_INTER_DATA
O
R_INTER_SUPER#
O
PCI CONTROLLER INTERFACE
D[15:0]
I/O
A[9:0]
I
WR#
I
RD#
I
CS#
I
IRQ[1:0]#
O
MISCELLANEOUS
RST#
I
MCLK
I
VXCO_CTRL
O
MON_OUT
O
MON_CLK
O
MON_DONE
O
DMCK_ALT
I
LTR
O
NTR
I/O
NTRCTL
I
TXSOC0
I
TXSOC1
I
RXSOC0
O
RXSOC1
O
PWR_DN
I
POWER AND GROUND
VDD
VDDcore
GND
VGG
Controller-less ADSL Modem Device Set for PCI Applications
Description
Receive Interleaved Data Bit Output
Clocked at BIT_CLOCK rate.
Receive Interleaved Data Bit Output Superframe Qualifier
PCI Controller Interface Data Bus
16-bit input/output bus to send/receive data to/from PCI controller.
PCI Controller Interface Address Bus
10-bit input bus to receive address from PCI controller.
Data Write Enable
Data Read Enable
Chip Select
Programmable Interrupts
Global Chip Reset
When low, puts chip into reset condition.
High-speed Master Clock
Connect to 35.328 MHz VCXO, which is 16 times the maximum Nyquist rate.
Oversampled VCXO analog control voltage
1-bit serial D/A output used for constellation monitoring
Serial Monitor Clock
Operates at 138 kHz.
New Symbol Constellation Qualifier
External 2x Clock
8 kHz Local Timing Reference
8 kHz Network Timing Reference
Network Timing Reference I/O Control
TC0 Block Transmit Start of Cell.
TC1 Block Transmit Start of Cell.
TC0 Block Receive Start of Cell
TC1 Block Receive Start of Cell
Power Down Control Pin
3.3V Power (I/O)
2.5V Power (Core)
Ground
I/O Clamp Power Supply (connect to 5 volt supply for 5 volt tolerance)
12
Conexant
Doc. No. 100394B
Proprietary Information
October 19, 1999

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