UT61L5128MC-15 데이터 시트보기 (PDF) - Utron Technology Inc
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UT61L5128MC-15 Datasheet PDF : 8 Pages
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Rev. 1.0
UTRON
UT61L5128
512K X 8 BIT HIGH SPEED CMOS SRAM
CAPACITANCE (TA=25℃, f=1.0MHz)
PARAMETER
SYMBOL
MIN.
Input Capacitance
CIN
-
Input/Output Capacitance
CI/O
-
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
MAX
8
10
UNIT
pF
pF
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
CL = 30pF, IOH/IOL = -1mA/4mA
AC ELECTRICAL CHARACTERISTICS (VCC = 3.3V±10% , TA = 0℃ to 70℃)
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
SYMBOL
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
UT61L5128-10*
MIN. MAX.
10
-
-
10
-
10
-
4.5
3
-
0
-
-
4
-
4
3
-
UT61L5128-12
MIN. MAX.
12
-
-
12
-
12
-
5
3
-
0
-
-
5
-
5
3
-
UT61L5128-15
MIN. MAX.
15
-
-
15
-
15
-
7
3
-
0
-
-
6
-
6
3
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
SYMBOL UT61L5128-10* UT61L5128-12
MIN. MAX. MIN. MAX.
Write Cycle Time
tWC
10
-
12
-
Address Valid to End of Write
tAW
8
-
8
-
Chip Enable to End of Write
tCW
8
-
8
-
Address Set-up Time
tAS
0
-
0
-
Write Pulse Width
tWP
8
-
8
-
Write Recovery Time
tWR
0
-
0
-
Data to Write Time Overlap
tDW
6
-
6
-
Data Hold from End of Write Time
tDH
0
-
0
-
Output Active from End of Write
tOW*
2
-
2
-
Write to Output in High Z
tWHZ*
-
5
-
6
*These parameters are guaranteed by device characterization, but not production tested.
* Vcc = 3.15V to 3.6V
UT61L5128-15
MIN. MAX.
15
-
10
-
10
-
0
-
10
-
0
-
7
-
0
-
2
-
-
7
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
P80061
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