AD7628
Figure 4. Dual DAC Unipolar Binary Operation (2 Quadrant Multiplication). See Table I.
Figure 5. Dual DAC Bipolar Operation (4 Quadrant Multiplication). See Table II.
Table I. Unipolar Binary Code Table
Table II. Bipolar (Offset Binary) Code Table
DAC Latch Contents
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
Analog Output
(DAC A or DAC B)
–V
IN
255
256
–V
IN
129
256
–V IN
128
256
=
–
V IN
2
127
–V IN 256
1
–V IN 256
–V IN
0
256
=
0
DAC Latch Contents
MSB LSB
11111111
10000001
10000000
01111111
00000001
00000000
Analog Output
(DAC A or DAC B)
+V
IN
127
128
+V
IN
1
128
0
–V
IN
1
128
–V
IN
127
128
128
–V IN 128
( ) NOTE: 1 LSB = (2–8)(VIN) =
1
256
V IN
( ) NOTE: 1 LSB = (2–7)(VIN) =
1
128
V IN
Table III. Recommended Trim Resistor Values
REV. A
Trim
Resistor
R1; R3
R2; R4
K/B/T
500
150
–5–