SGM8654 데이터 시트보기 (PDF) - Shengbang Microelectronics Co, Ltd
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SGM8654 Datasheet PDF : 17 Pages
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APPLICATION NOTES
Driving Capacitive Loads
The SGM865x can directly drive 47pF in unity-gain without
oscillation. The unity-gain follower (buffer) is the most sensitive
configuration to capacitive loading. Direct capacitive loading
reduces the phase margin of amplifiers and this results in
ringing or even oscillation. Applications that require greater
capacitive drive capability should use an isolation resistor
between the output and the capacitive load like the circuit in
Figure 1. The isolation resistor RISO and the load capacitor CL
form a zero to increase stability. The bigger the RISO resistor
value, the more stable VOUT will be. Note that this method
results in a loss of gain accuracy because RISO forms a voltage
divider with the RLOAD.
SGM8651
VIN
RISO
VOUT
CL
Figure 1. Indirectly Driving Heavy Capacitive Load
An improvement circuit is shown in Figure 2. It provides DC
accuracy as well as AC stability. RF provides the DC accuracy
by connecting the inverting signal with the output. CF and RIso
serve to counteract the loss of phase margin by feeding the
high frequency component of the output signal back to the
amplifier’s inverting input, thereby preserving phase margin in
the overall feedback loop.
Power-Supply Bypassing and Layout
The SGM865x family operates from either a single +2.7V to
+5.5V supply or dual ±1.35V to ±2.75V supplies. For
single-supply operation, bypass the power supply VDD with a
0.1µF ceramic capacitor which should be placed close to the
VDD pin. For dual-supply operation, both the VDD and the VSS
supplies should be bypassed to ground with separate 0.1µF
ceramic capacitors. 2.2µF tantalum capacitor can be added for
better performance.
Good PC board layout techniques optimize performance by
decreasing the amount of stray capacitance at the op amp’s
inputs and output. To decrease stray capacitance, minimize
trace lengths and widths by placing external components as
close to the device as possible. Use surface-mount
components whenever possible.
For the high speed operational amplifier, soldering the part to
the board directly is strongly recommended. Try to keep the
high frequency big current loop area small to minimize the EMI
(electromagnetic interfacing).
VDD
10µF
0.1µF
Vn
SGM8651
Vp
Vn
VOUT Vp
VDD
10µF
0.1µF
SGM8651
VOUT
10µF
CF
SGM8651
VIN
RISO
CL
RF
VOUT
RL
VSS(GND)
0.1µF
VSS
Figure 3. Amplifier with Bypass Capacitors
Figure 2. Indirectly Driving Heavy Capacitive Load with DC
Accuracy
For no-buffer configuration, there are two others ways to
increase the phase margin: (a) by increasing the amplifier’s
gain or (b) by placing a capacitor in parallel with the feedback
resistor to counteract the parasitic capacitance associated with
inverting node.
Grounding
A ground plane layer is important for high speed circuit design.
The length of the current path speed currents in an inductive
ground return will create an unwanted voltage noise. Broad
ground plane areas will reduce the parasitic inductance.
Input-to-Output Coupling
To minimize capacitive coupling, the input and output signal
traces should not be parallel. This helps reduce unwanted
positive feedback.
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SGM8651/2/3/4/5
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