SAB-80C535-N 데이터 시트보기 (PDF) - Infineon Technologies
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SAB-80C535-N Datasheet PDF : 56 Pages
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SAB 80C515/80C535
Pin Definitions and Functions (cont’d)
Symbol Pin
Pin
Input (I) Function
P-LCC-68 P-MQFP-80 Output (O)
PSEN 49
47
O
ALE
50
48
O
EA
51
49
I
P0.0-P0.7 52-59
52-59
I/O
The Program store enable
output is a control signal that enables the
external program memory to the bus
during external fetch operations. It is
activated every six oscillator periods,
except during external data memory
accesses. The signal remains high during
internal program execution.
The Address latch enable
output is used for latching the address into
external memory during normal operation.
It is activated every six oscillator periods,
except during an external data memory
access.
External access enable
When held high, the SAB 80C515
executes instructions from the internal
ROM as long as the PC is less than 8192.
When held low, the SAB 80C515 fetches
all instructions from external program
memory. For the SAB 80C535 this pin
must be tied low.
Port 0
is an 8-bit open-drain bidirectional I/O
port.
Port 0 pins that have 1's written to them
float, and in that state can be used as
high-impedance inputs.
Port 0 is also the multiplexed low-order
address and data bus during accesses to
external program and data memory. In
this application it uses strong internal
pullup resistors when issuing 1's.
Port 0 also outputs the code bytes during
program verification in the SAB 80C515.
External pullup resistors are required
during program verification.
Semiconductor Group
11
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