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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

SAA7151 데이터 시트보기 (PDF) - Philips Electronics

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SAA7151 Datasheet PDF : 49 Pages
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Philips Semiconductors
Digital multistandard colour decoder with
SCART interface (DMSD2-SCART)
Product specification
SAA7151B
PINNING
SYMBOL PIN DESCRIPTION
SP
1 connected to ground (shift pin for testing)
AP
2 connected to ground (action pin for testing)
RESN
3 reset, active-LOW
CREF
VDD1
CUV0
4 clock reference, sync from external to ensure in-phase signals on the Y-, CUV- and YUV-bus
5 +5 V supply input 1
6
CUV1
7
CUV2
8
CUV3
9
chrominance input data bits CUV7 to CUV0 (digitized chrominance signals in two’s complement
format from a S-Video source (S-VHS, Hi8) or time-multiplexed colour-difference signals from a
CUV4
10
YUV(RGB) source or both in combination)
CUV5
11
CUV6
12
CUV7
13
CVBS0 14
CVBS1 15
CVBS2 16
CVBS lower input data bits CVBS3 to CVBS0
(CVBS with luminance, chrominance and all sync information in two’s complement format)
CVBS3 17
VDD2
VSS1
CVBS4
18 +5 V supply input 2
19 ground 1 (0 V)
20
CVBS5 21
CVBS6 22
CVBS upper input data bits CVBS7 to CVBS4
(CVBS with luminance, chrominance and all sync information in two’s complement format)
CVBS7 23
GPSW1 24 status bit output FSST0 or port 1 output for general purpose (programmable by subaddress 0C)
GPSW2 25 status bit output FSST1 or port 2 output for general purpose (programmable by subaddress 0C)
HCL
26 black level clamp pulse output (begin and stop programmable), e.g. for TDA8708A (ADC)
LL27
27 line-locked system clock input signal (27 MHz)
VDD3
HSY
28 +5 V supply input 3
29 hor. sync pulse reference output (begin and stop programmable), e.g. for gain adj.TDA8708A
(ADC)
VS
30 vertical sync output signal (Fig.11)
HS
31 horizontal sync output signal (Fig.16; start point programmable)
RTCO
32 real time control output; serial increments of HPLL and FSCPLL and status PAL or SECAM
sequence (Fig.10)
XTAL
33 24.576 MHz clock output (open-circuit for use with external oscillator)
XTALI
34 24.576 MHz connection for crystal or external oscillator (TTL compatible squarewave)
VSSA
LFCO
VDDA
VSS2
35 analog ground
36 line frequency control output signal, multiple of horizontal frequency (nominal 6.75 MHz)
37 +5 V supply input for analog part
38 ground 2 (0 V)
April 1993
4

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