S3C24A0 데이터 시트보기 (PDF) - Samsung

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S3C24A0

AN APPLICATION PROCESSOR FOR 2.5G/3G MOBILE PHONES

Samsung 

BSW rv0.1-0417-N01

S3C24A0 RISC MICROPROCESSOR

PRELIMINARY PRODUCT OVERVIEW

1.2.8 Input Devices

• Keypad Interface

- Provides internal debouncing filter

- 5-input, 5-output pins for key scan in/out

• A/D Converter and Touch Screen Interface

- 8-ch multiplexed ADC

- Max. 500K samples/sec and 10-bit resolution

1.2.9 Storage Devices

• SD Host

- Compatible with SD Memory Card Protocol version 1.0

- Compatible with SDIO Card Protocol version 1.0

- 64 Bytes FIFO for Tx/Rx

- DMA based or Interrupt based operation

- Compatible with Multimedia Card Protocol version 2.11

• Memory Stick Host

- Memory Stick version 1.3 compliant

1.2.10 System Management

• Little Endian format support

• System operating clock generation

- Two on-chip PLLs, MPLL & UPLL

- MPLL generates the system reference clock, 200MHz@1.2V

- UPLL generates clocks for the USB Host/Device, IrDA and Camera

• Power Management

- Clock-off control for individual components

- Various power-down modes are available such as IDLE, STOP and SLEEP

- Wake-up by one of external interrupts or by the RTC alarm interrupt, etc.

1.2.11 Electrical Characteristics

• Operating Conditions

- - Supply Voltage for Logic Core: 1.25V +/- 0.05V

- - External Memory Interface: 1.8V / 2.5V / 3.3V

- - External I/O Interface: 3.3V

• Operational Frequency

- - Max. 200MHz@1.25V

1-9

Preliminary product information describes products that are in development,

for which full characterization data and associated errata are not yet available.

Specifications and information herein are subject to change without notice.

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