RT9722
PD(MAX) = (125°C − 25°C) / (165°C/W) = 0.606W for
WDFN-6L 2x2 package
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For the RT9722 Figure 4 shows the
maximum power dissipation allowed under various ambient
temperatures.
0.70
Single Layer PCB
0.60
0.50
WDFN-6L 2x2
0.40
0.30
SOT-23-5/SOT-23-6
0.20
0.10
0.00
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 4. RT9722 Maximum Power Dissipation Derating
Curve
Layout Consideration
For the best performance of the RT9722, careful PCB
layout is necessary. The following guidelines must be
considered:
` Keep all input and output traces as short and wide as
possible.
` Locate the bypass capacitors as close as possible to
the input and output pin of the RT9722.
` Avoid vias as much as possible. If vias are necessary,
make them as large as feasible.
` Place a ground plane under all circuitry to lower both
resistance and inductance and improve DC and transient
performance (Use a separate ground and power plane if
possible).
CIN Rpull-up
The main current
trace should be
as possible as
short and wide.
VIN FLG EN/EN
6
5
4
2
3
VOUT GND SET
The input and output
capacitors should be
placed as close as
COUT RSET
possible to the IC.
Figure 5. PCB Layout Guide
DS9722-00 August 2011
www.richtek.com
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