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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

RT9278 데이터 시트보기 (PDF) - Richtek Technology

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RT9278 Datasheet PDF : 13 Pages
First Prev 11 12 13
RT9278
Preliminary
Application Information
RT9278 integrates a high-efficiency synchronous rectifier
step-up DC-DC converter and a linear regulator controller.
To fully utilize its advantages, peripheral components
should be appropriately selected. The following information
provides basic considerations for component selection.
Inductor Selection
For a better efficiency in high switching frequency
converter, the inductor selection has to use a proper core
material such as ferrite core to reduce the core loss and
choose low ESR wire to reduce copper loss. The most
important point is to prevent the core saturated when
handling the maximum peak current. Using a shielded
inductor can minimize radiated noise in sensitive
applications. The maximum peak inductor current is the
maximum input current plus the half of inductor ripple
current. The calculated peak current has to be smaller
than the current limitation in the electrical characteristics.
A typical setting of the inductor ripple current is 20% to
40% of the maximum input current. If the selection is
40%
IPK
= IIN(MAX)
+
1
2
IRIPPLE
=
1.2
×
I
IN(MAX)
=
1.2
×

(IOUT(MAX) × VOUT
η × VIN(MIN)

The minimum inductance value is derived from the following
equation:
L = η × IIN(MIN)2 × [VOUT - VIN(MIN)]
0.4 × IOUT(MAX) × VOUT2 × fOSC
Depending on the application, the recommended inductor
value is between 2.2µH and 10µH.
Input Capacitor Selection
For better input bypassing, low-ESR ceramic capacitors
are recommended for performance. A 10µF input capacitor
is sufficient for most applications. For a lower output power
requirement application, this value can be decreased.
www.richtek.com
12
Output Capacitor Selection
For lower output voltage ripple, low-ESR ceramic capacitors
are recommended. The tantalum capacitors can be used
as well, but the ESR is bigger than ceramic capacitor. The
output voltage ripple consists of two components: one is
the pulsating output ripple current flows through the ESR,
and the other is the capacitive ripple caused by charging
and discharging.
VRIPPLE = VRIPPLE(ESR) + VRIPPLE(C)
IPEAK
× ESRCOUT
+
IPP
2×C×
f
Output Voltage Setting
Referring to application circuits (Figure 6), the output
voltage of the switching regulator (VOUT) can be set with
below equation :
VOUT
=
(1+
R2 )×
R1
VFB,
VFB = 0.8V (typ.)
Linear Regulator
Linear Regular MOSFETs Selection
The linear controller of RT9278 was designed to drive an
external P-Channel MOSFET. The main consideration of
pass MOSFETs of linear regulator is package selection
for efficient removal of heat. The power dissipation of a
linear regulator is
Plinear = (VIN-VOUT) x IOUT (W)
The criterion for selection of package is the junction
temperature below the maximum desired temperature with
the maximum expected ambient temperature.
Layout Guide
l A full GND plane without gap break.
l VDD to GND noise bypass Short and wide connection
for the 1µF MLCC capacitor between Pin7 and Pin3.
l VIN to GND noise bypass Add a capacitor close to L1
inductor, when VIN is not an ideal voltage source.
l Minimized FB node copper area and keep far away
from noise sources.
l The MOSFETs of linear regulator should have wide pad
to dissipate the heat.
DS9278-04 August 2007

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