RT9605B 데이터 시트보기 (PDF) - Richtek Technology
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RT9605B Datasheet PDF : 13 Pages
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Application Information
The RT9605B is designed to drive three sets of both high
side and low side N-MOSFET through externally input
PWM control signal. It has power-on protection function
which held UGATE and LGATE low before PVCC rising
across the threshold voltage. After the initialization, the
PWM signal takes the control. The rising PWM signal
first forces the LGATE turns low then UGATE is allowed
to go high just after a non-overlapping time to avoid shoot-
through. The falling of PWM signal first forces UGATE to
go low. When UGATE and PHASE reach a predetermined
low level, LGATE is allowed to turn high. The non-
overlapping function is also presented between UGATE
and LGATE signal transient.
The PWM signal is acted as "High" if above the rising
threshold and acted as "Low" if below the falling threshold.
Any signal level remaining within the shutdown window is
considered as "tri-state", the output drivers are disabled
and both MOSFET gates are pulled and held low. If the
PWM signal floating, the pin will be kept at 2.1V by the
internal divider and provide the PWM controller with a
recognizable level.
The RT9605B typically operates at frequency of 200kHz
to 300kHz. It shall be noted that to place a 1N4148 or
schottky diode between the PVCC and BOOT pin as
shown in the typical application circuit.
Driving Power MOSFETs
The DC input impedance of the power MOSFET is
extremely high. When Vgs at 12V, the gate draws the
current only few nano-amperes. Thus once the gate has
been driven up to "ON" level, the current could be
negligible.
However, the capacitance at the gate to source terminal
should be considered. It requires relatively large current
to source and sink the gate rapidly. It also needs to switch
drain current on and off with high speed. The required gate
drive currents are calculated as follows.
RT9605B
D1
d1
s1
L
VIN
Cgd1
Cgs1
Igd1 Igs1
Ig1
g1
g2
Ig2 Igd2
Igs2
Cgd2
Cgs2
d2
D2
s2
Vg1
VPHASE +12V
VOUT
GND
t
Vg2
12V
t
Figure 1. Equivalent Circuit and Associated Waveforms
In Figure 1, the current Ig1 and Ig2 are required to move the
gate up to 12V. The operation consists of charging Cgd
and Cgs. Cgs1 and Cgs2 are the capacitances from gate to
source of the high side and the low side power MOSFETs,
respectively. In general data sheets, the Cgs is referred as
"Ciss" which is the input capacitance. Cgd1 and Cgd2 are
the capacitances from gate to drain of the high side and
the low side power MOSFETs, respectively and referred
to the data sheets as "Crss" the reverse transfer
capacitance. For example, tr1 and tr2 are the rising time of
the high side and the low side power MOSFETs
respectively, the required current Igs1 and Igs2 are showed
,
below :
Igs1
=
Cgs1
dVg1
dt
= Cgs1 ×12
tr1
(1)
Igs2
=
Cgs2
dVg2
dt
=
Cgs2 ×12
tr2
(2)
DS9605B-03 March 2011
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