RT9605A 데이터 시트보기 (PDF) - Richtek Technology
부품명
상세내역
일치하는 목록
RT9605A Datasheet PDF : 12 Pages
| |||
RT9605A
Preliminary
Typical Application Circuit
PHASE2
L1
0.5uH
12V
1uH
R19 2.2
C16
3.3uF
VIN
Q3
Q1
Q2
C1
33pF
Optional
R2 C2
C8
1000uF
5V
C4
4.7uF
C9
1uF
C10 to C13
1500uF x 4
D1
C15
C14
1uF
R18
0
1uF
12V
R20
0
17 19 21 20 3
R1
15k
C3
10nF
R3 3k
VID5
VID0
VID1
VID2
VID3
VID4
R4 110k
R5 56k
R6 27k
R7 13k
R8 6.8k
R9 3.3k
R10 5.1k
RDROOP 6 PI
2 DACQ
R11
1.8k
1 DACFB
9 PGOOD
R12
10k
3.3V
12V
R13 27k
R14
3k
RT8800
GND
R15
16k
Optional
RICOMMON2
PWM3 15
PWM2 14
ISP3 10
ISP2 11
R16
Optional
C5 1uF
R17
Optional
C6
1uF
R17
Optional
430
RICOMMON1
C7
1uF
VCORE
16 BOOT2
7 PWM3
PHASE3
5 PWM2
4 PWM1
2 BOOT1
R
RT9605A
GND
R25
LGATE3 14 0
PVCC3 15
C21
1uF
PHASE3 11 12V
R26
UGATE3 10
0
BOOT3
9
C22
1uF
D3
12V
Q8
Q9
VIN
Q7 PHASE3
C23
3.3nF
R27
2.2
L2
0.5uH
PHASE2
R
PHASE1
R
1
C17
1uF
D2
24 22 23 8 R23 10
R21
0
12V C18
1uF
R22
0 C19 1uF
Q4
Q5
12V VIN
R24
2.2
C20
Q6
3.3nF
5VSB
PHASE1
L3
0.5uH
C24 to C35
1000uF x 12
C36 to C39
10uF x 4
VCORE
Functional Pin Description
UGATE1 (Pin 1), UGATE2 (Pin 17), UGATE3 (Pin 10)
Upper Gate Drive Output. Should be connected to the
upper MOSFET gate.
BOOT1 (Pin 2), BOOT2 (Pin 16), BOOT3 (Pin 9)
Floating bootstrap supply pin for the upper gate drive.
Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge
to turn on the upper MOSFET.
NC (Pin 3)
No connected.
PWM1 (Pin 4), PWM2 (Pin 5), PWM3 (Pin 7)
PWM input control signal. Connect this pin to the PWM
output of the controller. If the PWM signal enters and
remains within the shutdown window, are both UGATE
and LGATE are drived low, disabling the output MOSFETs.
GND [Pin 6, 12, 13, 18, Exposed Pad (25)]
Chip power ground. The exposed pad must be soldered
to a large PCB and connected to GND for maximum power
dissipation.
VDD (Pin 8)
Supply Input. Connect to +5V stand-by power. Place a
bypass capacitor between this pin and GND.
PHASE1 (Pin 24), PHASE2 (Pin 19), PHASE3 (Pin 11)
Upper driver return. Should be connected to the common
node of upper and lower MOSFETs. The PHASE voltage
is monitored for adaptive shoot-through protection.
LGATE1 (Pin 23), LGATE2 (Pin 20), LGATE3 (Pin 14)
Lower Gate Drive Output. Should be connected to the lower
MOSFET gate.
PVCC1 (Pin 22), PVCC2 (Pin 21), PVCC3 (Pin 15)
Supply Input. Connect to +12V supply. Place a bypass
capacitor between this pin and PGND.
www.richtek.com
2
All brandname or trademark belong to their owner respectively
DS9605A-05 August 2007
Share Link: 