Preliminary
RT8801B
0x01 Core Current. Default 0x00 (read only). The core current full scale is over current trigger point.
Bit6-0 : Show core voltage current.
0x03 MISC. Default 0x04.
Bit2 : Slot_OCC Detection. This bit be written clear and only can be written 0.
0 : Normal 1 : Slot_OCC ever be pulled high
Bit1 : The reset pin ever be pull low when bit0 = 1 and only can be written 0.
0 : Never issue reset 1 : Ever issue reset
Bit0 : Reset control. When this bit be write 1, the Watching Dog timer (Reset pin) will repeat counter 1400ms then pull
low 200ms.Reset pin be pull low, if this bit = 1 will reset all registers to default exception MISC(Index 0x03).
0 : Disable 1 : Enable
Note : If SLOT_OCC pin = 1 reset all registers value to default.
WD Timer
RST enable
0x03 bit 0
7 x Tdelay
Tdelay
RST
Product information registers (Read Only)
0x13 Revision_ID
0x00
DS8801B-04 August 2007
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