RT8074 데이터 시트보기 (PDF) - Richtek Technology
부품명
상세내역
일치하는 목록
RT8074 Datasheet PDF : 10 Pages
| |||
RT8074
1.4
Four-layer PCB
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power Dissipation
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the IC.
` Connect the terminal of the input capacitor(s), CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
` LX node experiences high frequency voltage swing and
should be kept within a small area.
` Keep all sensitive small signal nodes away from the LX
node to prevent stray capacitive noise pick up.
` Connect the FB pin directly to the feedback resistors.
The resistive voltage divider must be connected between
VOUT and GND.
Place the compensation
components as close to
the IC as possible
CCOMP
GND
Place the feedback
resistors as close to the IC
as possible
RCOMP
COMP
GND
EN
VIN
CIN
R2
8 FB
2
7 RT
GND
3
96
LX
4
5 LX
COUT
R1
ROSC
VOUT
GND
L1
LX should be connected
to inductor by wide and
short trace. Sensitive
VIN
VOUT components should be
Place the input and output capacitors kept away from this trace
as close to the IC as possible
Figure 4. PCB Layout Guide
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS8074-07 November 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
9
Share Link: 