RFT2P03L 데이터 시트보기 (PDF) - Intersil

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RFT2P03L

2.1A, 30V, 0.150 Ohm, P-Channel Logic Level, Power MOSFET

Intersil 

RFT2P03L

Typical Performance Curves Unless Otherwise Specified (Continued)

750

CISS

600

VGS = 0V, f = 0.1MHz

CISS = CGS + CGD

450

CRSS = CGD

COSS

COSS ≈ CDS + CGD

300

150

0

0

CRSS

-5

-10

-15

-20

-25

-30

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

-10

WAVEFORMS IN

DESCENDING ORDER:

-8

ID = 2.1A

ID = 1A

-6

VDD = -15V

-4

-2

0

0

3

6

9

12

15

Qg, GATE CHARGE (nC)

NOTE: Refer to Intersil Application Notes AN7254 and AN7260.

FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT

GATE CURRENT

Test Circuits and Waveforms

VARY tP TO OBTAIN

REQUIRED PEAK IAS

RG

0V

VGS

tP

VDS

L

DUT

-

VDD

+

IAS

0.01Ω

tAV

0

VDD

IAS

tP

BVDSS

VDS

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

VGS

Ig(REF)

VDS

RL

DUT

-

VDD

+

FIGURE 16. GATE CHARGE TEST CIRCUIT

0

VGS= -2V

-VGS

VDD

0

Ig(REF)

Qg(TH)

VDS

Qg(-10)

VGS= -10V

Qg(TOT)

VGS= -20V

FIGURE 17. GATE CHARGE WAVEFORM

7-7-23

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