RD74LVC138BFP 데이터 시트보기 (PDF) - Renesas Electronics
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RD74LVC138BFP Datasheet PDF : 10 Pages
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RD74LVC138B
3-to-8-line Decoder / Demultiplexer
REJ03D0502–0200
Rev.2.00
Jan. 14, 2005
Description
The RD74LVC138B has three binary select inputs in a 16 pin package. If the device is enabled these inputs determine
which one of the eight normally high outputs will go low. Two active low and one active high enables are provided to
ease the cascading of decoders. Low voltage and high-speed operation is suitable at the battery drive product (note type
personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• VCC = 1.65 V to 5.5 V
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
RD74LVC138BFPEL
RD74LVC138BTELL
SOP–16 pin (JEITA)
TSSOP–16 pin
FP–16DAV
TTP–16DAV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
Enable
G1 G2A G2B C
X
X
H
X
X
H
X
X
L
X
X
X
H
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H: High level
L: Low level
X: Immaterial
Select
B
A
X
X
X
X
X
X
L
L
L
H
H
L
H
H
L
L
L
H
H
L
H
H
Outputs
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
Rev.2.00 Jan. 14, 2005 page 1 of 7
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