RA8808 데이터 시트보기 (PDF) - RAIO
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RA8808 Datasheet PDF : 7 Pages
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Preliminary Version 1.0
RA8808
128x64Driver for Dot Matrix LCD
5-2 LCD Panel Interface
Pin Name
SEG0~
SEG127
COM0~
COM63
M
CL
FRM
MS
I/O
Description
LCD Segment Driver Output
Display RAM data 1 : On, Display RAM data 0 : Off
Relation of display RAM & M :
O
M
Data
Output Level
L
L
V2
L
H
V0
H
L
V3
H
H
GND
Common Signal Output for LCD Driving
Relation of common signal & M :
M
Common Signal
Output Level
O
L
L
V1
L
H
GND
H
L
V4
H
H
V0
Alternating Signal Input for LCD Driving.
I/O The input/output selection is determined by MS.
Display Synchronous Signal
I/O
Display data is latched at rising time of the CL signal and increments the Z-
address counter at CL falling time. The input/output selection is determined
by MS.
Synchronous Control Signal
I/O
Presets the 6-bit Z counter and synchronizes the common signal with the
frame signal when the frame signal becomes high. The input/output
selection is determined by MS.
Master/Slave Mode Selection
MS
Master/Slave Mode
I
H
L
Master
Slave
When in Master mode, M, CL, FRM are output pins.
When in Slave mode, M, CL, FRM are input pins.
5-3 Clock
Pin Name
RA
I/O
Description
In internal clock mode, this pin connects to external resistor for RC circuit.
In external clock mode, this pin is an input of external clock.
Internal Clock Mode
External Clock Mode
I
RA8808
RA
RB
RA8808
RA
RB
R
50pF
External Clock
Open
RB
CLK_OUT
In internal clock mode, this pin connects to external resistor for RC circuit.
O In external clock mode, this pin must keep floating.
O Internal system clock output for cascade application or others for user.
RAiO TECHNOLOGY INC.
5/7
www.raio.com.tw
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