HEF4094BTT 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4094BTT

8-stage shift-and-store register

NXP Semiconductors. 

NXP Semiconductors

HEF4094B

8-stage shift-and-store register

6. Functional description

Table 3. Function table[1]

Inputs

CP

OE

STR

D



L

X

X



L

X

X



H

L

X



H

H

L



H

H

H



H

H

H

Parallel outputs

QP0

QPn

Z

Z

Z

Z

NC

NC

L

QPn 1

H

QPn 1

NC

NC

Serial outputs

QS1

QS2

Q6S

NC

NC

Q7S

Q6S

NC

Q6S

NC

Q6S

NC

NC

Q7S

[1] At the positive clock edge, the information in the 7th register stage is transferred to the 8th register stage and the QSn outputs.

H = HIGH voltage level; L = LOW voltage level; X = don’t care;

 = positive-going transition;  = negative-going transition;

Z = HIGH-impedance OFF-state; NC = no change;

Q6S = the data in register stage 6 before the LOW to HIGH clock transition;

Q7S = the data in register stage 7 before the HIGH to LOW clock transition.

CLOCK INPUT

DATA INPUT

STROBE INPUT

OUTPUT ENABLE INPUT

INTERNAL Q0S (FF 0)

OUTPUT QP0

INTERNAL Q6S (FF 6)

OUTPUT QP6

SERIAL OUTPUT QS1

SERIAL OUTPUT QS2

Fig 6. Timing diagram

Z-state

Z-state

001aaf117

HEF4094B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 11 — 29 August 2013

© NXP B.V. 2013. All rights reserved.

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