HEF4094BU 데이터 시트보기 (PDF) - NXP Semiconductors.
부품명
상세내역
일치하는 목록
HEF4094BU Datasheet PDF : 20 Pages
| |||
NXP Semiconductors
HEF4094B
8-stage shift-and-store register
a. Input waveform
VI
negative
pulse
0V
VI
positive
pulse
0V
90 %
10 %
VM
10 %
tf
tr
90 %
VM
tW
90 %
VM
10 %
tr
tf
90 %
VM
10 %
tW
001aaj781
VI
G
VDD
DUT
VEXT
VO
RL
RT
CL
001aaj915
b. Test circuit
Test data is given in Table 10.
Definitions for test circuit:
DUT = Device Under Test.
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig 11. Test circuit
Table 10. Test data
Supply voltage Input
VDD
5 V to 15 V
VI
VSS or VDD
tr, tf
20 ns
VEXT
tPHL, tPLH
open
tPHZ, tPZH
VSS
tPLZ, tPZL
VDD
Load
CL
50 pF
RL
1 k
HEF4094B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 11 — 29 August 2013
© NXP B.V. 2013. All rights reserved.
11 of 20
Share Link: 