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MC14512BCL Datasheet PDF : 6 Pages
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SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C, See Figure 1)
All Types
Characteristic
Output Rise and Fall Time
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
Propagation Delay Time (Figure 2)
Inhibit, Control, or Data to Z
Symbol
tTLH,
tTHL
tPLH
VDD
Typ #
Max
Unit
ns
5.0
100
200
10
50
100
15
40
80
ns
5.0
330
650
10
125
250
15
85
170
Propagation Delay Time (Figure 2)
Inhibit, Control, or Data to Z
tPHL
ns
5.0
330
650
10
125
250
15
85
170
3–State Output Delay Times (Figure 3)
“1” or “0” to High Z, and
High Z to “1” or “0”
tPHZ, tPLZ,
5.0
60
150
ns
tPZH, tPZL
10
35
100
15
30
75
* The formulas given are for the typical characteristics only at 25_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Vin
50%
50%
DUTY
CYCLE
PULSE
GENERATOR
ID
DISABLE
INHIBIT Z
A
B
C
X0
X1
X2
X3
X4
X5
X6
X7
VSS
VDD
CL
Figure 1. Power Dissipation Test Circuit and Waveform
PULSE
GENERATOR
VDD
DISABLE
INHIBIT
A
B
C
X0
X1
X2
X3
X4
X5
X6
X7
Z
CL
VSS Parameter
Inhibit to Z
A, B, C to Z
20 ns
20 ns
DATA
tPLH
Z
90%
50%
10%
90%
50%
10%
tTLH
VDD
VSS
tPHL
VOH
VOL
tTHL
TEST CONDITIONS:
INHIBIT = VSS
A, B, C = VSS
20 ns
INHIBIT,
A, B, OR C
Test Conditions
A, B, C = VSS, XO = VDD
tPHL
Z
90%
50%
10%
90%
50%
10%
Inh = VSS, XO = VDD
tTHL
20 ns
VDD
VSS
tPLH VOH
VOL
tTLH
Figure 2. AC Test Circuit and Waveforms
MC14512B
372
MOTOROLA CMOS LOGIC DATA
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