HI5628(1999) 데이터 시트보기 (PDF) - Intersil

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HI5628
(Rev.:1999)

8-Bit, 165/125/60MSPS, Dual High Speed CMOS D/A Converter

Intersil 

HI5628

Electrical Specifications AVDD = +5V, DVDD = +5V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25oC for All Typical Values. Data given

is per channel except for ‘Power Supply Characteristics.’ (Continued)

PARAMETER

TEST CONDITIONS

HI5628IN

TA = -40oC TO 85oC

MIN TYP MAX

UNITS

AC CHARACTERISTICS - HI5628IN - 125MHz (Per Channel)

Spurious Free Dynamic Range,

SFDR Within a Window

fCLK = 125MSPS, fOUT = 32.9MHz, 10MHz Span (Notes 4, 7)

fCLK = 100MSPS, fOUT = 5.04MHz, 4MHz Span (Notes 4, 7)

Total Harmonic Distortion (THD) to Nyquist fCLK = 100MSPS, fOUT = 2.00MHz (Notes 4, 7)

Spurious Free Dynamic Range,

SFDR to Nyquist

fCLK = 125MSPS, fOUT = 32.9MHz, 62.5MHz Span (Notes 4, 7)

fCLK = 125MSPS, fOUT = 10.1MHz, 62.5MHz Span (Notes 4, 7)

fCLK = 100MSPS, fOUT = 40.4MHz, 50MHz Span (Notes 4, 7)

fCLK = 100MSPS, fOUT = 20.2MHz, 50MHz Span (Notes 4, 7)

fCLK = 100MSPS, fOUT = 5.04MHz, 50MHz Span (Notes 4, 7)

fCLK = 100MSPS, fOUT = 2.51MHz, 50MHz Span (Notes 4, 7)

AC CHARACTERISTICS - HI5628/6IN - 60MHz (Per Channel)

Spurious Free Dynamic Range,

SFDR Within a Window

fCLK = 60MSPS, fOUT = 10.1MHz, 10MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 5.02MHz, 2MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 1.00MHz, 2MHz Span (Notes 4, 7)

Total Harmonic Distortion (THD) to Nyquist fCLK = 50MSPS, fOUT = 2.00MHz (Notes 4, 7)

fCLK = 50MSPS, fOUT = 1.00MHz (Notes 4, 7)

Spurious Free Dynamic Range,

SFDR to Nyquist

fCLK = 60MSPS, fOUT = 20.2MHz, 30MHz Span (Notes 4, 7)

fCLK = 60MSPS, fOUT = 10.1MHz, 30MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 20.2MHz, 25MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 5.02MHz, 25MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 2.51MHz, 25MHz Span (Notes 4, 7)

fCLK = 50MSPS, fOUT = 1.00MHz, 25MHz Span (Notes 4, 7)

fCLK = 25MSPS, fOUT = 5.02MHz, 25MHz Span (Notes 4, 7)

VOLTAGE REFERENCE

-

70

-

dBc

-

73

-

dBc

-

67

-

dBc

-

51

-

dBc

-

61

-

dBc

-

48

-

dBc

-

56

-

dBc

-

68

-

dBc

-

68

-

dBc

-

70

-

dBc

-

73

-

dBc

-

74

-

dBc

-

67

-

dBc

-

68

-

dBc

-

54

-

dBc

-

60

-

dBc

-

53

-

dBc

-

67

-

dBc

-

68

-

dBc

-

68

-

dBc

-

71

-

dBc

Internal Reference Voltage, VFSADJ

Internal Reference Voltage Drift

Internal Reference Output Current

Sink/Source Capability

Reference Input Impedance

Reference Input Multiplying Bandwidth

Voltage at Pin 22 with Internal Reference

(Note 7)

1.04

-

1.16

±60

1.28

-

V

ppm/oC

-

0.1

-

µA

-

1

-

MΩ

-

1.4

-

MHz

DIGITAL INPUTS D7-D0, CLK (Per Channel)

Input Logic High Voltage with

5V Supply, VIH

(Note 3)

Input Logic High Voltage with

3V Supply, VIH

(Note 3)

Input Logic Low Voltage with

5V Supply, VIL

(Note 3)

Input Logic Low Voltage with

3V Supply, VIL

(Note 3)

Input Logic Current, IIH

Input Logic Current, IIL

Digital Input Capacitance, CIN

TIMING CHARACTERISTICS (Per Channel)

3.5

5

-

V

2.1

3

-

V

-

0

1.3

V

-

0

0.9

V

-10

-

+10

µA

-10

-

+10

µA

-

5

-

pF

5

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