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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

HI1396 데이터 시트보기 (PDF) - Intersil

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HI1396 Datasheet PDF : 10 Pages
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HI1396
Electrical Specifications TA = 25oC, AVEE = DVEE = -5.2V, VRT = 0V, VRB = -2V (Note 1) (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
NOTES:
1. Electrical Specifications guaranteed within stated operating conditions.
2. TPS: Times Per Sample.
3. PD = IEE VEE + (---V----R----TR-----R–----E-V---F-R----B----)--2--
UNIT
4. TA specified in still air and without heat sink. To extend temperature range, appropriate heat management techniques must be employed.
Timing Diagram
ANALOG IN
CLK
CLK
N
tPW1
tPW0
N+1
N+2
DIGITAL OUT
tOD
80%
N-1
20%
N
tr
FIGURE 1.
Pin Descriptions and I/O Pin Equivalent Circuits
PIN NUMBER
DIP
LCC
STANDARD
VOLTAGE
SYMBOL I/O LEVEL
29, 31, 49, 51, AGND -
0V
33, 35 53, 55
EQUIVALENT CIRCUIT
1, 25, 41, 42, AVEE
-
26, 38, 62, 63,
39
67
-5.2V
20%
N+1
80%
tf
DESCRIPTION
Analog GND. Used as GND for
input buffers and latches of
comparators. Isolated from
DGND1, DGND2.
Analog VEE -5.2V (Typ). Internally
connected to DVEE (Resistance:
4to 6). Bypass with 0.1µF to
AGND.
4

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