PI6C2504Q 데이터 시트보기 (PDF) - Pericom Semiconductor

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PI6C2504Q

Phase-Locked Loop Clock Driver with 4 Clock Outputs

Pericom Semiconductor 

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Phase-Locked Loop Clock Driver

with 4 Clock Outputs

Product Features

• High-Performance Phase-Locked-Loop Clock

Distribution for Networking

• Registered DIMM Synchronous DRAM modules

for server/workstation/PC applications

• Allows Clock Input to have Spread Spectrum

modulation for EMI reduction

• Zero Input-to-Output delay

• Low jitter: Cycle-to-Cycle jitter ±100ps max.

• On-chip series damping resistor at clock output

drivers for low noise and EMI reduction

• Operates at 3.3V VCC

• Wide range of Clock Frequencies up to 80 MHz

• Package: Plastic 16-pin QSOP Package (Q)

Product Description

The PI6C2504 features a low-skew, low-jitter, phase-locked loop

(PLL) clock driver, distributing high-frequency clock signals for

SDRAM and server applications. By connecting the feedback

FB_OUT output to the feedback FB_IN input, the propagation

delay from the CLK_IN input to any clock output will be nearly zero.

Logic Block Diagram

Product Pin Configuration

G

CLK_IN

PLL

FB_IN

AVCC

4

Y[0:3]

FB_OUT

Functional Table

Inputs

G

L

H

Outputs

Y[0:3]

FB_OUT

L

CLK_IN

CLK_IN

CLK_IN

AGND 1

VCC 2

Y0 3

Y1 4

GND 5

VCC 6

G7

FB_OUT 8

16 CLK_IN

15 AVCC

14 GND

16-Pin

Q

13 GND

12 Y3

11 Y2

10 VCC

9 FB_IN

1

PS8380A 07/17/00

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