PI74ALVCH16270 데이터 시트보기 (PDF) - Pericom Semiconductor
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PI74ALVCH16270 Datasheet PDF : 5 Pages
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PI74ALVCH16270
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Product Pin Description
Pin Name
OE
CLK
SEL
CLKEN
Description
Output Enable Input (Active LOW)
Clock
Select (Active Low)
Clock Enable (Active Low)
A,1B,2B
GND
VCC
3-State Outputs
Ground
Power
Truth Tables(1)
Inputs
Outputs
CLK OEA OEB
A
1B, 2B
H
H
Z
Z
H
L
Z
Active
L
H
Active
Z
L
L
Active Active
Product Pin Configuration
OEA
CLKEN1B
2B3
GND
2B2
2B1
VCC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
CLKEN2B
SEL
1
56
2
55
3
54
4
53
5
52
6 56-PIN 51
7
A56
V56
50
8
49
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
25
32
26
31
27
30
28
29
OEB
CLKENA2
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
CLKENA1
CLK
A to B Storage (OEB = L)
INPUTS
CLKENA1 CLKENA2 CLK A
L
H
XX
L
H
XX
L
L
L
L
L
H
H
L
L
H
L
H
H
H
XX
OUTPUTS
1B
1B0(3)
1B0(3)
2B
2B0(3)
2B0(3)
L(2)
L
H(2)
H
1B0(3)
L
1B0(3)
H
1B0(3) 2B0(3)
B to A Storage (OEA = L)
Inputs
Outputs
CLKEN1B CLKEN2B CLK SEL 1B 2B A
H
X
X
H
X X A0(3)
X
H
X
L
XX
A0(3 )
L
X
H LX
L
L
X
H HX
H
X
L
L XL
L
X
L
L XH
H
Notes:
1. H = High Signal Level
L=
Low Signal Level
X = Irrelevant
Z = High Impedance
↑ = Transition, Low to High
2. Two CLK edges are needed to propagate data.
3. Output level before the indicated steady state
input conditions were established.
2
PS8171A 03/05/03
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