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MM74HC595CW 데이터 시트보기 (PDF) - Fairchild Semiconductor

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MM74HC595CW
Fairchild
Fairchild Semiconductor Fairchild
MM74HC595CW Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
AC Electrical Characteristics (Continued)
Symbol
Parameter
Conditions
VCC
TA = 25°C
TA = −40 to 85°C TA = −55 to 125°C Units
Typ
Guaranteed Limits
tPZH, tPZL Maximum Output Enable
from G to QA thru QH
tPHZ, tPLZ Maximum Output Disable
Time from G to QA thru QH
RL = 1 k
CL = 50 pF
CL = 150 pF
CL = 50 pF
CL = 150 pF
CL = 50 pF
CL = 150 pF
RL = 1 k
CL = 50 pF
2.0V
75
175
220
2.0V
100
245
306
4.5V
15
35
44
4.5V
20
49
61
6.0V
13
30
37
6.0V
17
42
53
2.0V
75
175
220
4.5V
15
35
44
6.0V
13
30
37
265
ns
368
ns
53
ns
74
ns
45
ns
63
ns
265
ns
53
ns
45
ns
tS
Minimum Setup Time
from SER to SCK
2.0V
4.5V
100
125
20
25
150
ns
30
ns
6.0V
17
21
25
ns
tR
Minimum Removal Time
from SCLR to SCK
2.0V
4.5V
50
63
10
13
75
ns
15
ns
6.0V
9
11
13
ns
tS
Minimum Setup Time
from SCK to RCK
2.0V
4.5V
100
125
20
25
150
ns
30
ns
6.0V
17
21
26
ns
tH
Minimum Hold Time
SER to SCK
2.0V
4.5V
5
5
5
5
5
ns
5
ns
6.0V
5
5
5
ns
tW
Minimum Pulse Width
of SCK or SCLR
2.0V
30
80
100
4.5V
9
16
20
120
ns
24
ns
6.0V
8
14
18
22
ns
tr, tf
Maximum Input Rise and
Fall Time, Clock
2.0V
4.5V
1000
500
1000
500
1000
ns
500
ns
6.0V
400
400
400
ns
tTHL, tTLH Maximum Output
Rise and Fall Time
2.0V
25
60
75
4.5V
7
12
15
90
ns
18
ns
tTHL, tTLH
QA–QH
Maximum Output
Rise & Fall Time
6.0V
6
10
13
2.0V
75
95
4.5V
15
19
15
ns
110
ns
22
ns
QH
CPD
Power Dissipation
Capacitance, Outputs
G = VCC
G = GND
6.0V
13
16
90
150
19
ns
pF
pF
Enabled (Note 6)
CIN
Maximum Input
Capacitance
5
10
10
10
pF
COUT
Maximum Output
Capacitance
15
20
20
20
pF
Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
5
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