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74HC594N

8-bit shift register with output register

Philips Electronics 

Philips Semiconductors

8-bit shift register with output register

AC WAVEFORMS

Product specification

74HC/HCT594

(1) HC: VM = 50%; VI = GND to VCC

HCT: VM = 1.3 V; VI = GND to 3 V

Fig.7

Waveforms showing the shift clock

(SHCP) to output (Q7’) propagation delays,

the shift clock pulse width and the maximum

shift clock frequency.

SH CP INPUT

VM (1)

t su

1/ f max

STCP INPUT

Q n OUTPUTS

VM (1)

tW

t PLH

VM (1)

(1) HC: VM = 50%; VI = GND to VCC

HCT: VM = 1.3 V; VI = GND to 3 V

t PHL

MLA512

Fig.8

Waveforms showing the storage clock

(STCP) to output (Qn) propagation delays,

the storage clock pulse width, maximum

storage clock frequency and the shift clock

to storage clock set-up time.

handbook, halfpage

SHR INPUT

STCP INPUT

VM (1)

t su

VM (1)

(1) HC: VM = 50%; VI = GND to VCC

HCT: VM = 1.3 V; VI = GND to 3 V

Fig.9 Waveforms showing the data set-up and

hold times for the Ds input.

Q n OUTPUTS

VM (1)

MBC326

(1) HC: VM = 50%; VI = GND to VCC

HCT: VM = 1.3 V; VI = GND to 3 V

Fig.10 Waveforms showing the set-up time from

shift reset (SHR) to storage clock (STCP).

December 1991

9

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