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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

PI49FCT3802LE 데이터 시트보기 (PDF) - Pericom Semiconductor

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PI49FCT3802LE
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI49FCT3802LE Datasheet PDF : 6 Pages
1 2 3 4 5 6
Features
• High Frequency >156 MHz
• High-speed, low-noise, non-inverting buffer
- PI49FCT3802 is 1:5 buffer
- PI49FCT3803 is 1:7 buffer
• Low-skew (<250ps) between any two output clocks
• Low duty cycle distortion <250ps
• Low propagation delay <2.5ns
• 5V Tolerant input
• Multiple VDD, GND pins for noise reduction
• 3.3V supply voltage
• Packaging (Pb-free & Green available):
- 16-pin TSSOP (L)
- 16-pin QSOP (Q)
Block Diagram (PI49FCT3802)
CLK0
BUF_IN
CLK1
CLK2
CLK3
CLK4
Block Diagram (PI49FCT3803)
CLK0
BUF_IN
CLK1
CLK2
CLK3
CLK6
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffer
for Networking Applications
Description
The PI49FCT380x is a 3.3V compatible, high-speed, low-noise
non-inverting clock buffer. The key goal in designing the
PI6C380x is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 250ps, the PI49FCT380x is an
ideal clock distribution device for synchronous systems. Designing
synchronous networking systems requires a tight level of skew from
a large number of outputs.
Pin Description
Pin Name
3802
3803
BUF_IN
CLK[0:4]
GND
VDD
BUF_IN
CLK[0:4]
GND
VDD
Pin Configuration (PI49FCT3802)
Description
Input
Outputs
GND
Power
BUF_IN 1
GND 2
CLK0 3
VDD 4
CLK1 5
GND 6
NC 7
VDD 8
16 VDD
15 CLK4
14 CLK3
16-Pin
L, Q 13 GND
12 CLK2
11 VDD
10 NC
9 GND
Pin Configuration (PI49FCT3803)
BUF_IN 1
GND 2
CLK0 3
VDD 4
CLK1 5
GND 6
CLK2 7
VDD 8
16 VDD
15 CLK6
14 CLK5
16-Pin
L, Q 13 GND
12 CLK4
11 VDD
10 CLK3
9 GND
1
PS8559A 09/14/04

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