PE9702(2003) 데이터 시트보기 (PDF) - Peregrine Semiconductor Corp.

부품명

상세내역

일치하는 목록

PE9702
(Rev.:2003)

3.0 GHz Integer-N PLL for Rad Hard Applications

Peregrine Semiconductor Corp. 

Functional Description

The PE9702 consists of a prescaler, counters, a

phase detector, and control logic. The dual

modulus prescaler divides the VCO frequency by

either 10 or 11, depending on the value of the

modulus select. Counters “R” and “M” divide the

reference and prescaler output, respectively, by

integer values stored in a 20-bit register. An

additional counter (“A”) is used in the modulus

Figure 3. Functional Block Diagram

fr

R Counter

(6-bit)

PE9702

Advance Information

select logic. The phase-frequency detector

generates up and down frequency control signals.

The control logic includes a selectable chip

interface. Data can be written via serial bus,

parallel bus, or hardwired directly to the pins. There

are also various operational and test modes and a

lock detect output.

fc

D(7:0)

Sdata

Control

Pins

Control

Logic

R(5:0)

M(8:0)

A(3:0)

Phase

Detector

Modulus

Select

Fin

10/11

M Counter

Fin

Prescaler

(9-bit)

PD_U

PD_D

LD

Cext

fp

Copyright  Peregrine Semiconductor Corp. 2003

Page 8 of 15

File No. 70/0036~00C | UTSi  CMOS RFIC SOLUTIONS

Share Link: