PE4237 데이터 시트보기 (PDF) - Peregrine Semiconductor Corp.
부품명
상세내역
일치하는 목록
PE4237 Datasheet PDF : 8 Pages
| |||
Figure 3. Pin Configuration
RF2 1
GND 2
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
RF1 3
6 RFC
5 CTRL
4 VDD
Table 2. Pin Descriptions
Pin
Pin
No.
Name
Description
1
RF2
RF2 port.1
Ground Connection. Traces should be
physically short and connected to the
2
GND
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
performance.
3
RF1
RF1 port.1
4
VDD
Nominal 3 V supply connection.
CMOS or TTL logic level:
5
CTRL
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
6
RFC
Common RF port for switch.1
Notes: 1. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC.
Table 3. Operating Ranges
Parameter
Min Typ
VDD Power Supply Voltage
2.7
3.0
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V)
29
TOP Operating temperature
range
-40
Control Voltage High
0.7xVDD
Control Voltage Low
Max
3.3
35
Units
V
µA
85
°C
V
0.3xVDD
V
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE4237 in the 6-lead 3x3 DFN package is MSL1.
PE4237
Product Specification
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max Units
VDD
Power supply voltage
-0.3 4.0
V
VI
Voltage on any input
except for the CTRL input
-0.3
VDD+
0.3
V
VCTRL
Voltage on CTRL input
5.0
V
TST
Storage temperature range -65 150
°C
PIN
Input power (50 Ω)
VESD
ESD voltage (Human Body
Model)
35 dBm
250
V
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Control Logic Input
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal. For
flexibility to support systems that have 5-volt
control logic drivers, the control logic input has
been designed to handle a standard 5-volt TTL
control signal. This TTL control signal input must
not exceed 5-volts or damage to the switch could
result.
Table 5. Control Logic Truth Table
Control Voltage
Signal Path
CTRL = CMOS or TTL High
RFC to RF1
CTRL = CMOS or TTL Low
RFC to RF2
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2003-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0071-06 │ UltraCMOS™ RFIC Solutions
Share Link: 