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PDSP16488A/MA/GCPR 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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PDSP16488A/MA/GCPR
ZARLINK
Zarlink Semiconductor Inc ZARLINK
PDSP16488A/MA/GCPR Datasheet PDF : 33 Pages
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PDSP16488A
INPUT
0
DELAYS
REG B3 = 1
PDSP16488A
0
DELAYS
DELAY = 0, DEFINED BY REG D3:2 = 00
WIDTH = S
LINE
DELAYS
Σ
0
ZERO DELAYS
+
4 CLOCK
DELAY
4 CLOCK
DELAYS
REG D0 = 0
0
DELAYS
REG B3 = 1
Nth PDSP16488A IN THE ROW
0
DELAYS
DELAY = 0, DEFINED BY REG D3:2 = 00
WIDTH = S
LINE
DELAYS
Σ
0/4
DELAYS
+
4 CLOCK
DELAY
REG D0 = 0 IF S = 4,
OR REG D0 = 1 IF S = 8
0
DELAYS
REG B3 = 0
PDSP16488A
D
DELAYS
D = 41S(N21) DEFINED BY REG D3:2
WIDTH = S
LINE
DELAYS
Σ
0
DELAYS
+
4 CLOCK
DELAY
4 CLOCK
DELAYS
REG D0 = 0
0
DELAYS
REG B3 = 1
Nth PDSP16488A IN THE ROW
D D = 41S(N21) DEFINED BY REG D3:2
DELAYS
WIDTH = S
LINE
DELAYS
Σ
0/4
DELAYS
+
4 CLOCK
DELAY
REG D0 = 0 IF S = 4,
OR REG D0 = 1 IF S = 8
0
DELAYS
REG B3 = 0
PDSP16488A
D D = 41S(N21) DEFINED BY REG D3:2
DELAYS
WIDTH = S
LINE
DELAYS
Σ
0
DELAYS
+
4 CLOCK
DELAY
REG D0 = 0
0
DELAYS
REG B3 = 1
Nth PDSP16488A IN THE ROW
D
DELAYS D = 41S(N21) DEFINED BY REG D3:2
WIDTH = S
LINE
DELAYS
Σ
0/4
DELAYS
+
4 CLOCK
DELAY
REG D0 = 0 IF S = 4,
OR REG D0 = 1 IF S = 8
OUTPUT
Fig. 7 Multi-device delay paths
Delay Compensation for Large Windows
A large window is composed of several partial windows each of
which is implemented in an individual device. If necessary the partial
window must be padded with zero coefficients to become one of the
standard sizes. When constructing a large window it is necessary to
delay the expansion data inputs in order to compensate for growth
in the horizontal direction. Delays in the partial sums are also
necessary to compensate for the total pipeline delay needed to
produce the previous complete horizontal stripe.
Within each device in a horizontal stripe, apart from the first,
the expansion input must be delayed by the width of the partial
window, before it is added to the internal sum. Since partial
windows can only be 4 or 8 pixels wide, a delay of 4 or 8 pixel
clocks is needed. There is, however, an in-built delay of 4 pixels
in the inter device connection, and the PDSP16488A thus only
needs an option to delay the expansion input by an additional four
pixels.
10

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