PCK2509SADH 데이터 시트보기 (PDF) - Philips Electronics

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PCK2509SADH

50–150 MHz 1:9 SDRAM clock driver

Philips Electronics 

Philips Semiconductors

50–150 MHz 1:9 SDRAM clock driver

FUNCTIONAL BLOCK DIAGRAM

11

1G

14

2G

CLK 24

PLL

FBIN 13

AVCC 23

Product specification

PCK2509SA

3

1Y0

4

1Y1

5 1Y2

8

1Y3

9 1Y4

21

2Y0

20

2Y1

17

2Y2

16

2Y3

12

FBOUT

SW00388

FRONT SIDE

A[L]VC

A[L]VC

A[L]VC

PCK2509SA

The PLL clock distribution device and A[L]VC registered drivers reduce

signal loads on the memory controller and prevent timing delays and

waveform distortions that would cause unreliable operation

SW00431

2000 Dec 01

4

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