PCK2023DGG 데이터 시트보기 (PDF) - Philips Electronics
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PCK2023DGG
Philips Electronics
PCK2023DGG Datasheet PDF : 30 Pages
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Philips Semiconductors
CK408 (66/100/133/200 MHz) spread
spectrum differential system clock generator
Product data
PCK2023
PIN DESCRIPTION
PIN NUMBER
56
2
3
44, 45, 48, 49, 51, 52
33
35
24
21, 22, 23
5, 6, 7
10, 11, 12, 13, 16, 17,
18
39
38
40
54, 55
42
43
25
34
53
28
29
30
1, 8, 14, 19, 32, 37, 46,
50
26
4, 9, 15, 20, 31, 36, 41,
47
27
SYMBOL
ref
XTAL_In
XTAL_Out
CPU & CPU
[2:0]
3V66_0
3V66_1/VCH
66In/3V66_5
66Buff [2:0] / 3V66 [4:2]
PCIF
[2:0]
PCI
[6:0]
USB
DOT
S2
S1, S0
Iref
Mult0
PWRDWN
PCI_Stop
CPU_Stop
Vtt_Pwrgd
SDATA
SCLOCK
3.3 V 14.318 MHz clock output.
14.318 MHz crystal input.
14.318 MHz crystal output.
FUNCTION
Differential CPU clock outputs.
3.3 V 66 MHz clock output.
3.3 V selectable through I2C to be 66 MHz or 48 MHz
66 MHz input to buffered 66Buff and PCI or 66 MHz clock from internal VCO.
66 MHz buffered outputs from 66 input or 66 MHz clocks from internal VCO.
33 MHz clocks divided down from 66 input or divided down from 3V66.
PCI clock outputs divided down from 66 input or divided down from 3V66.
Fixed 48 MHz clock output.
Fixed 48 MHz clock output.
Special 3.3 V 3 level input for mode selection.
3.3 V LVTTL inputs for CPU frequency selection.
A precision resistor is attached to this pin which is connected to the internal current
reference.
3.3 V LVTTL input for selecting the current multiplier for the CPU outputs.
3.3 V LVTTL input for PowerDown active low.
3.3 V LVTTL input for PCI_Stop active low.
3.3 V LVTTL input for CPU_Stop active low.
3.3 V LVTTL input is a level sensitive strobe used to determine when S [2:0] and Mult0
inputs are valid and ok to be sampled (active low).
I2C compatible SDATA.
I2C compatible SCLOCK.
VDD
VDDA
VSS
VSSA
3.3 V power supply for outputs.
3.3 V power supply for PLL.
Ground for outputs.
Ground for PLL.
2001 Sep 07
3
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