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PCK2023DL

CK408 (66/100/133/200 MHz) spread spectrum differential system clock generator

Philips Electronics 

Philips Semiconductors

CK408 (66/100/133/200 MHz) spread

spectrum differential system clock generator

Product data

PCK2023

BYTE 0

BIT DESCRIPTION/FUNCTION

0

S0 reflects the value of the

Sel_0 pin sampled on

power-up

1

S1 reflects the value of the

Sel_1 pin sampled on

power-up

2

S2 reflects the value of the

Sel_2 pin sampled on

power-up

3 PCI_stop. This bit is ANDed

with the PCI_STOP pin for

I2C readback and control of

PCI outputs

4

CPU_stop reflects the

current value of the external

CPU_Stop pin

5

VCH select 66 MHz/48MHz

enabled

6

not used

7

spread spectrum enabled

BYTE 1

TYPE

R

R

R

RW

R

RW

—

RW

POWER UP

CONDITION

externally selected

OUTPUT(S)

AFFECTED

N/A

externally selected

N/A

externally selected

N/A

externally selected

All PCI clock

outputs except

PCI[2:0] pins

externally selected All CPU clock pairs

0 = 66MHz enabled

0

0 = spread off

3V66_1/VCH

—

CPU[2:0],

3V66[1:0]

PIN AFFECTED

N/A

N/A

N/A

10, 11, 12, 13, 16,

17, 18

44, 45, 48, 49, 51,

52

35

—

5, 6, 7, 10, 11, 12,

13, 16, 17, 18, 33,

35

BIT DESCRIPTION/FUNCTION TYPE

POWER UP

CONDITION

0

CPU0 output enable

RW

1 = enabled

1 = enabled

0 = disabled

1

CPU1 output enable

RW

1 = enabled

1 = enabled

0 = disabled

2

CPU2 output enable

RW

1 = enabled

1 = enabled

0 = disabled

3

allow control of CPU0 with

RW 0 = not free running,

assertion of CPU_Stop

is affected by

1 = enabled

CPU_Stop

0 = disabled

4

allow control of CPU1 with

RW 0 = not free running,

assertion of CPU_Stop

is affected by

1 = enabled

CPU_Stop

0 = disabled

5

allow control of CPU2 with

RW 0 = not free running,

assertion of CPU stop

is affected by

1 = enabled

CPU_Stop

0 = disabled

6

not used

—

0

7

CPU Mult0 value sampled

R

externally selected

at startup

OUTPUT(S)

AFFECTED

CPU0

CPU0

CPU1

CPU1

CPU2

CPU2

CPU0

CPU0

CPU1

CPU1

CPU2

CPU2

—

N/A

PIN AFFECTED

51, 52

48, 49

44, 45

51, 52

48, 49

44, 45

—

N/A

SOURCE PIN

54

55

40

34

53

N/A

—

N/A

SOURCE PIN

N/A

55

40

34

53

N/A

—

43

2001 Sep 07

18

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