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PCK2014A

CK98 (100/133 MHz) spread spectrum system clock generator

Philips Electronics 

Philips Semiconductors

CK98 (100/133 MHz) spread spectrum

system clock generator

Product specification

PCK2014A

AC WAVEFORMS

VM = 1.25 V @ VDDQ2 and 1.5 V @ VDDQ3

VX = VOL + 0.3 V

VY = VOH –0.3 V

VOL and VOH are the typical output voltage drop that occur with the

output load.

CPUCLK

@133MHz

1.25V

VDDQ2

VSS

3v66

@66MHz

1.5V

THPOFFSET

CPU leads 3V66

VDDQ3

VSS

SW00354

Figure 1. CPUCLK to 3V66 offset

3V66

@ 66MHz

1.5V

VDDQ3

VSS

PCICLK

@ 33MHz

1.5V

THPOFFSET

3V66 leads PCICLK

Figure 2. 3V66 to PCI offset

VDDQ3

VSS

SW00356

CPUCLK

@ 133MHz

1.25V

VDDQ2

VSS

IOAPIC

@ 16.6MHz

1.25V

THPOFFSET

CPUCLK leads IOAPIC

VDDQ2

VSS

SW00357

Figure 3. CPU to IOAPIC offset

2.5V CLOCKING

INTERFACE

2.0

1.25

0.4

THKP

DUTY CYCLE

THKH

TRISE

TFALL

THKL

3.3V CLOCKING

2.4

INTERFACE

1.5

(TTL)

0.4

TPKH

TPKP

TRISE

TFALL

TPKL

SW00242

Figure 4. 2.5V/3.3V clock waveforms

COMPONENT

MEASUREMENT

POINTS

2.5 V MEASUREMENT POINTS

VOH = 2.0 V

VDDQ2

1.25 V

VOL = 0.4 V

VSS

SYSTEM

MEASUREMENT

COMPONENT

POINTS

MEASUREMENT

POINTS

3.3 V MEASUREMENT POINTS

VOH = 2.4 V

VDDQ3

1.5 V

VOL = 0.4 V

VSS

SYSTEM

MEASUREMENT

POINTS

SW00822

Figure 5. Component versus system measure points

VI

SEL133/100,

SEL1, SEL0

VM

GND

VDD

OUTPUT

LOW-to-OFF

OFF-to-LOW

VOL

tPLZ

VX

tPZL

VM

VOH

OUTPUT

HIGH-to-OFF

OFF-to-HIGH

VSS

tPHZ

outputs

enabled

tPZH

VY

outputs

disabled

VM

outputs

enabled

SW00454

Figure 6. 3-State enable and disable times

2001 Apr 02

12

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