A6273KA(2007) 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6273KA
(Rev.:2007)

8-Bit Latched, DMOS Power Driver

Allegro MicroSystems 

6273

8-BIT LATCHED

DMOS POWER DRIVER

RECOMMENDED OPERATING CONDITIONS

over operating temperature range

Logic Supply Voltage Range, VDD ............... 4.5 V to 5.5 V

High-Level Input Voltage, VIH ............................ ≥ 0.85VDD

Low-level input voltage, VIL ................................. ≤0.15VDD

ELECTRICAL CHARACTERISTICS at TA = +25°C, VDD = 5 V, tir = tif ≤ 10 ns (unless otherwise

specified).

Characteristic

Logic Supply Voltage

Output Breakdown

Voltage

Symbol

VDD

V(BR)DSX

Test Conditions

Operating

IO = 1 mA

Min.

4.5

50

Limits

Typ.

Max.

5.0

5.5

—

—

Units

V

V

Off-State Output

Current

IDSX

VO = 40 V

VO = 40 V TA = 125°C

—

0.05

1.0

µA

—

0.15

5.0

µA

Static Drain-Source

rDS(on) IO = 250 mA, VDD = 4.5 V

—

1.3

2.0

Ω

On-State Resistance

IO = 250 mA, VDD = 4.5 V, TA = 125°C

—

2.0

3.2

Ω

IO = 500 mA, VDD = 4.5 V (see note)

—

1.3

2.0

Ω

Nominal Output

Current

IO(nom) VDS(on) = 0.5 V, TA = 85°C

—

250

—

mA

Logic Input Current

Prop. Delay Time

IIH

VI = VDD = 5.5 V

IIL

VI = 0, VDD = 5.5 V

tPLH

IO = 250 mA, CL = 30 pF

—

—

1.0

µA

—

—

-1.0

µA

—

625

—

ns

tPHL

IO = 250 mA, CL = 30 pF

—

150

—

ns

Output Rise Time

tr

IO = 250 mA, CL = 30 pF

Output Fall Time

tf

IO = 250 mA, CL = 30 pF

Supply Current

IDD(off) VDD = 5.5 V, Outputs OFF

IDD(on) VDD = 5.5 V, Outputs ON

Typical Data is at VDD = 5 V and is for design information only.

NOTE — Pulse test, duration ≤100 µs, duty cycle ≤2%.

—

675

—

ns

—

400

—

ns

—

15

100

µA

—

150

300

µA

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

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