M29W008AB80N6T 데이터 시트보기 (PDF) - STMicroelectronics

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M29W008AB80N6T

8 Mbit (1Mb x8, Boot Block) Low Voltage Single Supply Flash Memory

STMicroelectronics 

M29W008AT, M29W008AB

Table 2. Absolute Maximum Ratings (1)

Symbol

Parameter

Value

Unit

TA

Ambient Operating Temperature (3)

–40 to 85

°C

TBIAS

Temperature Under Bias

–50 to 125

°C

TSTG

Storage Temperature

–65 to 150

°C

VIO (2)

Input or Output Voltage

–0.6 to 5

V

VCC

Supply Voltage

–0.6 to 5

V

V(A9, E, G, RP) (2) A9, E, G, RP Voltage

–0.6 to 13.5

V

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions

above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-

tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-

ity documents.

2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.

3. Depends on range.

The block erase operation can be suspended in

order to read from or program to any block not be-

ing erased, and then resumed.

Block protection provides additional data security.

Each block can be separately protected or unpro-

tected against Program or Erase on programming

equipment. All previously protected blocks can be

temporarily unprotected in the application.

Bus Operations

The following operations can be performed using

the appropriate bus cycles: Read (Array, Electron-

ic Signature, Block Protection Status), Write com-

mand, Output Disable, Stand-by, Reset, Block

Protection, Unprotection, Protection Verify, Unpro-

tection Verify and Block Temporary Unprotection.

See Tables 5 and 6.

Command Interface

Instructions, made up of commands written in cy-

cles, can be given to the Program/Erase Controller

through a Command Interface (C.I.). For added

data protection, program or erase execution starts

after 4 or 6 cycles. The first, second, fourth and

fifth cycles are used to input Coded cycles to the

C.I. This Coded sequence is the same for all Pro-

gram/Erase Controller instructions. The ’Com-

mand’ itself and its confirmation, when applicable,

are given on the third, fourth or sixth cycles. Any

incorrect command or any improper command se-

quence will reset the device to Read Array mode.

Instructions

Seven instructions are defined to perform Read

Array, Auto Select (to read the Electronic Signa-

ture or Block Protection Status), Program, Block

Erase, Chip Erase, Erase Suspend and Erase Re-

sume. The internal P/E.C. automatically handles

all timing and verification of the Program and

Erase operations. The Status Register Data Poll-

ing, Toggle, Error bits and the RB output may be

read at any time, during programming or erase, to

monitor the progress of the operation.

Instructions are composed of up to six cycles. The

first two cycles input a Coded sequence to the

Command Interface which is common to all in-

structions (see Table 9). The third cycle inputs the

instruction set-up command. Subsequent cycles

output the addressed data, Electronic Signature or

Block Protection Status for Read operations. In or-

der to give additional data protection, the instruc-

tions for Program and Block or Chip Erase require

further command inputs. For a Program instruc-

tion, the fourth command cycle inputs the address

and data to be programmed. For an Erase instruc-

tion (Block or Chip), the fourth and fifth cycles in-

put a further Coded sequence before the Erase

confirm command on the sixth cycle. Erasure of a

memory block may be suspended, in order to read

data from another block or to program data in an-

other block, and then resumed.

When power is first applied or if VCC falls below VL-

KO, the command interface is reset to Read Array.

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