HI5746EVAL1(1999) 데이터 시트보기 (PDF) - Intersil

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HI5746EVAL1
(Rev.:1999)

10-Bit, 40 MSPS A/D Converter

Intersil 

Timing Waveforms

ANALOG

INPUT

HI5746

CLOCK

INPUT SN - 1 HN - 1 SN

HN SN + 1 HN + 1 SN + 2

SN + 5 HN + 5 SN + 6 HN + 6 SN + 7 HN + 7 SN + 8 HN + 8

INPUT

S/H

1ST

STAGE

2ND

STAGE

B1, N - 1

B1, N

B1, N + 1

B1, N + 4

B1, N + 5

B1, N + 6

B1, N + 7

B2, N - 2

B2, N - 1

B2, N

B2, N + 4

B2, N + 5

B2, N + 6

9TH

STAGE

B9, N - 5

B9, N - 4

B9, N

B9, N + 1

B9, N + 2

B9, N + 3

DATA

OUTPUT

DN - 7

DN - 6

DN - 2

DN - 1

DN

DN + 1

tLAT

NOTES:

4. SN: N-th sampling period.

5. HN: N-th holding period.

6. BM, N: M-th stage digital output corresponding to N-th sampled input.

7. DN: Final data output corresponding to N-th sampled input.

FIGURE 1. HI5746 INTERNAL CIRCUIT TIMING

ANALOG

INPUT

CLOCK

INPUT

DATA

OUTPUT

1.5V

tAP

tAJ

1.5V

DATA N - 1

tOD

tH

2.4V

0.5V

DATA N

FIGURE 2. INPUT-TO OUTPUT TIMING

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