NJW1132L 데이터 시트보기 (PDF) - Japan Radio Corporation
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NJW1132L Datasheet PDF : 9 Pages
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NJW1132
n DEFINITION OF I2C REGISTER
l I2C BUS FORMAT
MSB
LSB
MSB
LSB
S Slave Address A Select Address
MSB
A
1bit
8bit
1bit
8bit
1bit
Data
8bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
l SLAVE ADDRESS
MSB
LSB
1
0
0
0
0
0
1 R/W
LSB
AP
1bit 1bit
R/W=0: Receive Only
l CONTROL REGISTER TABLE
Select
Address
D7
00H
01H
CHS
02H
BCB
03H
BCT
04H
05H
OUT
BIT
D6
D5
D4
D3
D2
D1
D0
VOL
BAL
AGC
SUR
BASS
BCSB
SUB-BASS
TREB
BCST
SUB-TREB
BBE-Low
BBE-High
*
Reserved*
AUX1
AUX0
* : Don’t care.
l CONTROL REGISTER DEFAULT VALUE
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
0
0
0
0
0
0
0
01H
0
0
0
0
0
0
0
0
02H
0
0
0
0
0
0
0
0
03H
0
0
0
0
0
0
0
0
04H
0
0
0
0
0
0
0
0
05H
0
0
0
0
0
0
0
0
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