NJU6678CL 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6678CL

104-common x 132-segment BIT MAP LCD DRIVER

Japan Radio Corporation  

BLOCK DIAGRAM

VSS

VDD

5

V1 to V5

C1+

C1-

C2+

C2-

C3+

C3-

C4+

C4-

Voltage

Generator

VR

T1,T2

C

0

C

S

51

0

S

131

C

103

C52

COM

Drive r

S EG

D ri v er

COM

Drive r

Shi ft

Reg is t er

Shift

Re gis t e r

D isp lay Da ta La t ch

Display Data RAM

160 x 132

NJU6678

COM SEG

Timing

Generator

Culumn Address Decoder

Culumn Address Counter

Culumn Address Register

Mu lt ip lexe r

Display

Timing

Generator

OSC.

OSC1

OSC2

Instruction Decoder

Sta t us

In t e rna l Bu s

BF

Bus Ho l de r

Res et

RES

MPU I nt e rf ac e

CS

RD CEL68

D0 to D7 (SI,SCL)

A0

WR

P/S

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